UMC


May 12, 2017

Advanced processes feature at VLSI in June

Among the papers at this year's VLSI Symposia in Hawaii in June, Samsung will describe a 7nm CMOS process that uses EUV lithography to tighten up device features on minimum-pitch interconnects.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: , ,
November 12, 2014

Chip tariff eliminated and the big winner is… China?

Not just Intel and TI but also Lenovo and Huawei have cause to welcome end to 25% import tax. And could it even help reinvigorate Chinese start ups?

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