CoWoS


April 22, 2019

Machine learning and chiplets headline VLSI Symposia

Large-scale MCMs and novel device architectures bookend the papers on machine learning at VLSI Symposia in an event that will also cover chiplet integration and other topics.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , ,   |  Organizations: , ,
June 18, 2017

TSMC encapsulates CoWoS for supersized SiP

TSMC encapsulated the multiple chips assembled on a 1200mm2 silicon substrate to cut the chance of damage from warping with the company's CoWoS2 SiP technology.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , ,   |  Organizations:

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