Siemens compiles analog into simulation for faster debug

By Chris Edwards |  No Comments  |  Posted: July 12, 2022
Topics/Categories: Blog - EDA  |  Tags: , , , , ,  | Organizations:

With the aim of speeding up the debug and verification of large mixed-signal SoCs, Siemens Digital Industries Software has launched a second version of its Symphony simulation environment.

Symphony Pro will sit alongside the existing Symphony product, which provides a way to integrate digital simulators from Cadence, Siemens or Synopsys with analog simulation engines so that the two domains can be verified together. The Pro version uses Siemens’ own Questa digital simulator as this provides the ability to augment the compilation and simulation phases with engines that help identify bugs in the analog circuitry and in the A/D interfaces as well as issues with on-chip power management more easily and quickly.

Sumit Vishwakarma, principal product manager for Siemens’ mixed-signal business unit, pointed to the results of engineer surveys on causes of problems in SoC design. These have highlighted issues caused by A/D interfaces and analog tuning as key causes of design delays. At the same time, the setup overhead for co-simulation can be onerous. Not only that, problems at the interfaces can be hard to track down.

A key example, Vishwakarma said, is that of X propagation from an analog block into the digital domain because the output of the block failed to pass a clear threshold between a logic 0 or logic 1 level. Tracking down the root cause of that error is time-consuming with conventional simulation and waveform-analysis tools, he said. Symphony Pro helps with that issue by compiling analog information into a database that is used by Questa to trace signals within the design. This data allows the source of an X to be traced back to the point where it first appeared. In the Visualizer waveform-analysis and debug tool, different views can be cross-probed. “It can cut down debug time from days to hours,” he claimed.

A similar augmentation happens with the support for UPF power control to check that correct isolation and level shifting takes place. This support is through an expanded set of boundary elements that formed a key part of the original Symphony product.

To support behavioral simulation of analog blocks, Symphony also includes support for real-number modeling. “At some of our big customers everything is driven by the digital guys. They keep asking the analogue teams “we want to verify this because the later we do this the more problems we have”.

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