Two projects to deliver digital twins for software-defined vehicles

By Chris Edwards |  No Comments  |  Posted: March 14, 2024
Topics/Categories: Blog - EDA, IP  |  Tags: , , , ,  | Organizations: , ,

Arm is working with Cadence Design Systems and Siemens Digital Industries Software on separate projects to support its plans in the software-defined vehicle (SDV) space.

Cadence has started a collaboration with the IP provider to deliver a chiplet-based reference design and software. Siemens has used its PAVE360 software to build the first accelerated simulation environment to support the recently launched Arm Cortex-A720AE processor complex.

“The automotive industry’s move to the software defined vehicle means that traditional software and hardware development processes are no longer valid and must evolve to meet the industry’s demands,” said Mike Ellow, executive vice president of EDA at Siemens. “Our partnership with Arm, supporting an accelerated simulation environment with Cortex-A720AE CPU, is helping to address automotive industry challenges by reducing time-to-market for SDV software through the availability of accelerated automotive platforms well ahead of silicon.”

Running on AWS cloud servers, the aim of the PAVE360 software is to provide simulation speeds that rival those of evaluation boards and deliver more flexibility than traditional on-premises approaches. The solution is available today to select software ecosystem partners, tier-one suppliers and OEMs, with broad availability planned afterwards.

Cadence’s chipset-focused project includes a software stack development platform designed to act as a digital twin of hardware designed to be compliant with the Scalable Open Architecture for Embedded Edge (SOAFEE) initiative software standard. That will allow software development to begin before hardware is available and allowing subsequent system integration validation.

The architecture and reference design developed by Arm and Cadence uses Universal Chiplet Interconnect Express (UCIe) for high-speed chiplet-to-chiplet communication to provide a standard interface. The Cadence components of the solution include the Helium digital twin and IP to support the relevant protocols for chipsets and other components, as well as support for machine-learning cores.

“The automotive industry is evolving rapidly and AI and software advancements are emphasizing a greater need to speed up development cycles,” said Dipti Vachani, senior vice president and general manager of Arm’s automotive line of business. “Together with critical ecosystem partners like Cadence, we’re enabling faster software and hardware development by bringing together a complete solution of design and verification technologies underpinned by the latest Automotive Enhanced technologies from Arm, allowing developers to start building for next-generation SDVs well before silicon is available in the market.”

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