EDA

February 21, 2019

Mentor Embedded Linux launch targets enterprise-class gap

The suite is based on Debian and aims to offer the performance and configurability needed for robust and scaleable enterprise-class applications in medical, industrial, aerospace and defense markets.
February 21, 2019

DVCon USA 2019 preview: Metrics Technologies

Metrics Technologies demonstrate its cloud-based platform for ASIC and complex FPGA verification and discuss a new partnership with Concept Engineering.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: ,
February 21, 2019

DVCon USA 2019 preview: Verific Design Automation

Verific Design Automation , specialist in parsers for SystemVerilog, VHDL and UPF, will also demo its INVIO platform with high level Python and C++ APIs.
Article  |  Topics: Blog - EDA, - Tool development  |  Tags: , , , , , ,   |  Organizations: ,
February 20, 2019

DVCon USA 2019 preview: ESD Alliance

The electronic systems design community's main trade organization will be at DVCon with the latest updates on the process of becoming a SEMI strategic association partner.
Article  |  Topics: Conferences, Blog - EDA, - Standards  |  Tags:   |  Organizations: , ,
February 19, 2019

DVCon USA 2019 preview: Breker Verification Systems

The company will demonstrate the latest capabilities in its Trek5 portfolio, building on Accellera's Portable Stimulus Standard.
February 19, 2019

DVCon USA 2019 preview: SmartDV

The verification IP specialist is focusing on its new products for RISC-V verification and for emulation platforms next week in San Jose.
Article  |  Topics: Conferences, Verification  |  Tags: , , ,   |  Organizations: ,
February 18, 2019

UltraSoC scales up debug architecture

UltraSoC has increased the capacity of its embedded analytics architecture to encompass large-scale manycore architectures.
Article  |  Topics: Blog - IP  |  Tags: , ,   |  Organizations:
February 18, 2019

How to optimize your testbench-to-DUT connections

Testbench connections often depend on the virtual interface feature of SystemVerilog but other options - like abstract classes - can help.
February 15, 2019

China Focus 1: Wally Rhines maps startup and design growth

In the first of a weekly series on China's evolving design sector, we look at how the Mentor President and CEO identifies some of the key drivers.
February 11, 2019

DVCon USA 2019 preview: Mentor

DVCon USA is coming soon. Mentor's 2019 involvement includes a keynote from parent Siemens and a tutorial on managing your formal verification processes.