Chipmaker

An ESD Alliance panel on incoming Californian energy regulations originally scheduled for later this month has been postponed.

Cadence has reworked two parts of its verification suite to streamline the use of multicore computers for simulation and FPGA-based prototyping systems.

Ceva's latest iteration of its XC architecture aims at the intensive DSP required for 5G basestations.

Xilinx plans to add high-speed analog interfaces to its upcoming FPGAs to better support high-density 5G basestation designs.

The major verification conference is looming and Mentor's participation will include tutorials that explore the latest in portable stimulus, SystemC, VIP and more.

Microsemi has launched a family of non-volatile FPGAs that use a 28nm process to increase density over the previous SmartFusion devices.

The major West Coast technical conference for lithography is just two weeks away and offers a packed agenda.

HiSilicon has licensed UltraSoC’s semiconductor IP to build into SoCs for system monitoring, analysis, and optimization.

ARM has launched the first of a series of Cortex-M series microcontrollers based on the V8M architecture that incorporate the Trustzone security mechanism.

Catch up with the vendor's plans for the ARM technical conference in Santa Clara later this month.