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Mentor Graphics' recent deal with ARM illustrates how proliferation in design is influencing deals between tool and IP vendors.

About 1,600 new UVM System Verilog verification IP memory models will cut testbench development time and offer more time to increase coverage.

Videos discuss formal verification planning, correct initialisation, writing constraints, developing properties, interpreting results - and knowing when you have done enough.

Mentor Graphics is looking to get yet more efficiency from its market-leading Veloce emulator family through an OS upgrade and new task-specific Apps.

Security took center stage at the Embedded World show in Nürnberg this week, with a number of vendors launching software intended to help protect against hacks.

Directed self assembly techniques may offer similar benefits to EUV lithography, especially for DRAM makers, says SPIE conference paper

ARM has gone back to the 32bit realm for its latest Cortex-A processor core, aiming the device at a new generation of low-cost platforms inspired by the success of the Raspberry Pi as well as wearables.

Verification specialist's DVCon activities are headlined by a panel on emulation and static verification.

Mentor Graphics chairman and CEO Wally Rhines will deliver the DVCon keynote as the vendor sets a deep agenda for the conference.

ARM and Ceva have both aimed at the need for to juggle control code and DSP in the upcoming LTE-Advanced and 5G with their latest processor core architectures.