verification IP

February 11, 2015

Accellera sets up group for one-stop verification stimulus

Accellera has set up a working group to develop a language-independent way of capturing and managing test stimuli that can be used across a wide range of verification environments.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations:
April 10, 2014

Mentor builds simulation-emulation bridge to ‘Verification 3.0’

Enterprise Verification Platform adds cross-over SystemVerilog, UVM, and UPF support for Veloce alongside new hardware and software debuggers.
March 4, 2014

Synopsys targets 5X performance gain with integrated verification suite

New tool technologies, Verdi integration and greater flow concurrency also contribute to a claimed 3X increase in productivity for Verification Compiler.
October 9, 2013

Jasper preps User Group and Architectural events

The EDA vendor has set a broad agenda across two Silicon Valley events taking place in late October, with registration now open for both.
Article  |  Topics: Blog Topics, Conferences  |  Tags: , , , ,   |  Organizations:
May 20, 2013

TVS expands VIP library

Test and Verification Solutions has expanded its library of verification IP to cover protocols in MIPI, memories, serial IO and communication.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , , , ,   |  Organizations:
April 4, 2013

Accellera extends verification work to legacy environments

Accellera Systems Initiative has created a working group to look at one of the knottiest problems in IC design: to simplify the job of checking designs when the bits come from so many sources and use languages that were not built for interoperability.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
November 27, 2012

Cadence gears up for automotive switch to ethernet

Cadence Design Systems has developed semiconductor IP for the automotive industry's OPEN Alliance to make ethernet the core networking backbone of future motor vehicles.
October 25, 2012

‘Known unknowns’ and the Cadence take on verification IP

Reviewing some of the sector's main trends with Susan Peterson, group director for VIP at the market leader.
Article  |  Topics: Blog Topics, Commentary, Blog - EDA, - Verification  |  Tags:   |  Organizations: , , , ,
October 25, 2012

Using verification IP to master AMBA and wider protocol proliferation

How and why Huawei's Hisilicon and DSP specialist CEVA tapped Cadence to implement ARM protocols.
Article  |  Topics: Blog Topics, Commentary, Blog - EDA, - Standards, Verification  |  Tags: ,   |  Organizations: , , ,

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