Author Archives: TDF Staff

Automotive AI specialist FABU has licensed a portfolio of IP from Synopsys to help assemble ISO 26262-compliant SoCs

Data-centre networking chip goes through full-chip design rule checking and layout-versus-schematic signoff on TSMC's 16nm finFET process in a day.

Physical verification challenge of large SoCs on leading-edge processes detailed in video series

Closing code coverage from HLS has been tricky because the C++ tools were built for software not hardware. But that is changing.

Synopsys is targeting artificial intelligence (AI) and data centre SoCs as key application areas for the interface IP.

As ITC 2018 begins, Mentor addresses stringent ISO 26262 requirements and looks to bridge the gap in how IJTAG-based debug is structured.

Synopsys is taking IC design on TSMC processes into the cloud with the launch of the Synopsys Cloud Solution, which will run on platforms from Synopsys, Amazon Web Services (AWS) or Microsoft Azure.

A recent white paper from Synopsys outlines the complexities of developing hardware for use in machine-learning and artificial-intelligence (AI) systems.

Collaboration on DTCO offers IBM a better way to evaluate combinations of transistor architectures, materials and other process technology innovations using design metrics, before real wafers become available for physical experimentation.

Faster PHYs needed to shift vast amounts of data around giant data centres.