December 4, 2020
Study may point to new challenges in more bidirectional AMS implementations on SoC-class designs, though formal and emulation help keep respin count in check.
December 1, 2020
Benchmark study detects correlation between maturity of verification processes and the quality of designs when they reach production.
November 27, 2020
Use of the open-source RISC-V processor was tracked for the first time by the biennial study, finding notably high take-up.
November 3, 2020
A partnership between Siemens and VSI, a real-world autonomous vehicle research company, aims to refine and promote digital twin strategies.
October 29, 2020
The free-to-attend user meetings for Mentor clients will retain the same format mixing technical presentations with keynotes and networking.
October 27, 2020
A Japanese component supplier is making it easier for its customers to choose the right parts for their designs by offering a powerful analog and mixed-signal (AMS) simulation environment through its website.
October 22, 2020
Functional verification for increasingly complex ARM-based designs is at the heart of the new consultancy partnership.
September 21, 2020
Today's increasingly complex and integrated RFICs pose complex verification challenges best addressed before costly simulation runs.
July 30, 2020
Arm works with EDA to find new efficiencies based on extra CTL-based check in Questa runs.
July 20, 2020
Mentor adds Analog FastSPICE eXTreme innovations for designs facing increasing parasitic complexity and contact resistance challenges at cutting edge nodes.