Scaling power integrity analysis to match analog content in today’s designs
Siemens introduces mPower to bridge the analog-to-digital gap in IR-drop and EM analysis, reflecting the scaling trends in today's ICs.
Verification
Overcome reset domain crossing challenges when using UPF
A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
Learn how to apply formal verification to safety-critical aviation designs
A detailed technical overview of formal verification within the context of the DO-254 (ED-80) standard is now available to download.
PCIe 6.0 gets verification IP as formal arrival approaches
Questa suite of VIP adds PC and enterprise protocol as players prep designs for 2023 release.
Understand how DO-254 defines verification for avionics
The avionics design assurance guidance has its own flavor of verification which needs to be understood alongside its definition of validation.
How MaxLinear cut physical verification time with in-design DRC
A case study describes how the RF and AMS specialist achieved efficiencies on a complex server DSP SoC project by running as-you-go DRC during place and route.
Siemens extends Solido’s reach into IP validation with Fractal
Latest acquisition adds technologies to mitigate rising verification time and cost for third-party IP.
Siemens buys formal start-up OneSpin
The formal apps start-up has built strong positions in automotive and RISC-V and will strengthen Siemens in competition with Cadence.
How to simplify ESD verification with pre-coded checks
Electrostatic discharge verification is becoming increasingly hard to achieve but automated pre-loaded checks can now help.
How to use virtual mode in emulation
Virtual strategies make for greater productivity and widen the number of emulation use cases. A new paper considers some of the most popular examples.
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