PCIe 6.0 gets verification IP as formal arrival approaches

By TDF Editor |  No Comments  |  Posted: May 28, 2021
Topics/Categories: Blog - EDA, IP, - Verification  |  Tags: , , , , , , ,  | Organizations: ,

Siemens Digital Industries Software has extended its simulator-independent Questa Verification IP (QVIP) to include PCI Express 6.0, the latest version of the networking protocol that is due to be formally finalized later this year. A complete specification is nevertheless already available.

PCIe 6.0 doubles the data rate for PC and enterprise implementations to 64GT/s link rate negotiation and is expected to feature in designs from 2023 onwards, principally for high-end storage, networking, artificial intelligence and machine learning applications.

The QVIP is compatible with all advanced verification environments based on the UVM architecture. It can be applied to the functional verification of all layers of the PCIe 6.0 specification and includes a full set of ready-to-use verification components and stimuli.

“Innovative customers looking to gain a first-mover advantage by adopting the early versions of PCIe Gen 6 need a reliable and comprehensive verification IP platform to validate their designs,” said Stephane Hauradou, chief technology officer for high speed interconnect specialist PLDA.

“With its long heritage of leadership in PCIe VIP, Questa VIP delivers an ideal environment for developing next-generation designs that help our customers differentiate and win in highly competitive markets.”

PLDA has itself just launched XpressRICH Controller IP for the incoming protocol.


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