November 15, 2023
Siemens has completed the acquisition of Insight EDA, a specialist in circuit-reliability analysis.
October 24, 2023
Chiplet-based 3DIC designs present new challenges for flows that integrate tasks from design exploration to physical verification.
October 9, 2023
From tutorials to technical papers to special 'diamond' sessions, Tessent features large at ITC 2023.
October 9, 2023
Tessent RTL Pro allows wrapper cells and x-bounding logic to be inserted earlier in designs.
October 3, 2023
Siemens and CEA-List have signed a deal under which the two organisations will research the combination of digital-twin and AI.
September 28, 2023
Get to know more on the specific benefits of shift left and how to achieve easy adoption.
August 8, 2023
Just how much of the flow has already has 'shift left' benefit and what is fueling further progress.
July 10, 2023
Calibre Design Enhancer moves physical verification checks and automated DRC-clean via and cell insertion into P&R
July 10, 2023
Three fast developing AI techniques underpin the efficiencies in the new Solido custom design and verification platform.
June 20, 2023
Single-device tracking in the chiplet and multi-chip age needs a boost to deliver accuracy and greater production efficiency.