tunnel FET

Semiconductor process options outlined at IEDM by Luc van den Hove of imec as industry faces hard choices and rising costs

The modelling track at IEDM 2012 showed how germanium could be used in 14nm finFETs. Other work focused on tunnel FETs and analyzing MEMS using Spice.

Designers should plan ahead for future process changes as conventional silicon CMOS runs out of steam, IMEC's Rudy Lauwereins told delegates at the International Electronics Forum in Bratislava this week.