density fill


March 20, 2013

DATE: Early shift to finFET processes challenges IP development strategies

An early shift to finFET processes is making developing IP libraries more challenging.
Article  |  Topics: Conferences, Blog - EDA, IP  |  Tags: , , , , , ,   |  Organizations:
December 4, 2012

IPSoC: 20nm causes analog ‘density fill headaches’

20nm design is fraught with problems for analog design but one that causes the biggest headaches is density variation, says Synopsys' Joachim Kunkel.
Article  |  Topics: Blog - EDA  |  Tags: , , ,   |  Organizations:

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