Verifying in an HLS context for AI and ML designs
A SystemC/C++ app from a library that extends the OneSpin 360 DV-Verify platform was used by ML IP specialist NanoSemi on a 5G/WiFi project.
artificial intelligence
Building an ecosystem around HLS for AI and ML designs
Mentor's AI Accelerator Ecosystem adds reference designs, libraries and other forms of support around its Catapult HLS platform.
The road to ES Design West: AI
AI, its system design implications and its impact on EDA tools themselves will be a key theme for ES Design West next month.
ARM adds Cortex-A77 and Mali-G77 cores for 5G and ML
The company is also bundling its new CPU and GPU cores in a premium IP platform that can be tuned for next generation applications and devices.
AI and ML fuel Catapult and Calibre updates
Mentor takes the wraps off new machine learning fueled features in its HLS and physical design families ahead of DAC 2019.
DAC 2019 preview: Mentor
Mentor is active across the program and its main and Verification Academy booths within the exhibition in Las Vegas.
Boost your DFT efficiency for AI silicon design
Three hierarchical DFT strategies help cut time-to-market for large AI chips by exploiting regularity and addressing test at the RTL.
China Focus 1: Wally Rhines maps startup and design growth
In the first of a weekly series on China's evolving design sector, we look at how the Mentor President and CEO identifies some of the key drivers.
Synopsys catalogues AI IP
The rapid growth of interest in machine learning and artificial intelligence has prompted Synopsys to bring all its AI IP together in a microsite and brochure.
DAC 2018 preview: Mentor
Mentor will be present throughout the DAC program but with a particular focus on machine learning, artificial intelligence and automotive challenges.