Author Archives: TDF Editor

About TDF Editor

The head honcho
October 9, 2023

ITC 2023 preview: Siemens DIS

From tutorials to technical papers to special 'diamond' sessions, Tessent features large at ITC 2023.
Article  |  Topics: EDA - DFT  |  Tags:   |  Organizations: , , ,
September 28, 2023

Shift left: what it does and how to make it happen

Get to know more on the specific benefits of shift left and how to achieve easy adoption.
July 10, 2023

Siemens fuels custom IC flows with artificial intelligence

Three fast developing AI techniques underpin the efficiencies in the new Solido custom design and verification platform.
June 20, 2023

Maximize manufacturing execution with HPC

Single-device tracking in the chiplet and multi-chip age needs a boost to deliver accuracy and greater production efficiency.
April 25, 2023

Alps Alpine composes capacitance IC with Symphony

The company says the mixed-signal platform enabled a 5X improvement in verification productivity.
April 17, 2023

Achieving functional coverage of multi-language designs

There is no comprehensive standard yet for functional coverage across designs using SystemC, TLM, UVM and SystemVerilog, but there are options using UVM Connect.
December 1, 2022

Siemens aims to simplify compliance for Linux medical devices

New Quality Package focuses on safety and cybersecurity compliance with EU and US medical device standards.
Article  |  Topics: Blog - Embedded  |  Tags: , , , , , , , ,   |  Organizations:
November 23, 2022

Chipletz pushes packaging design for AI, HPC and immersive use-cases

The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
October 6, 2022

Arm adds Corellium expertise for IoT to its Virtual Hardware platform

The start-ups virtualization platform has already been gaining traction in comms and security.
Article  |  Topics: Security, Tool development  |  Tags: , ,
September 8, 2022

Module verification demands integrated DRC and LVS

The system-in-package and module trends in system design promote bringing together physical (DRC) and electrical (LVS) verification.