Author Archives: TDF Editor

About TDF Editor

The head honcho
April 29, 2022

Navigate variables and lifetimes in SystemVerilog

Variable lifetimes are an apparently basic but also tricky feature within the verification language.
Article  |  Topics: Verification  |  Tags: , , , , ,   |  Organizations: ,
April 28, 2022

Go inside proposals for common chiplet models

Chiplets will need models to guarantee heterogenous SiP implementation. A cross-industry working group describes its progress so far.
April 27, 2022

Verifying the new namespace storage options in NVMe 2.0

The NVMe 2.0 specification has introduced two namespace options that boost SSD performance while optimizing storage life.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations:
March 13, 2022

Learn strategies for better measurement and test in simulation-based PCB design

A new white paper offers useful tips and techniques for PDN analysis and performance optimization in designs such as those using DDR4.
Article  |  Topics: Blog - PCB  |  Tags: , , , , ,   |  Organizations:
February 10, 2022

Capturing connectivity for assembly verification in 2.5D and 3D design

Learn how to ingest data from multiple engineering teams in multiple formats on interposer and other multi-dimensional projects.
Article  |  Topics: Verification  |  Tags: , , , , , , , , ,   |  Organizations:
February 8, 2022

How digital twin evaluations optimize STCO-based design

System Technology Co-optimization raises various SI, PI, thermal, mechanical and warp risks due to its use of advanced packaging. Early-stage prototyping mitigates them.
January 25, 2022

Choose the right advanced packaging methodology for metal fill rules

Advanced packaging requirements from foundries and OSATs pose stringent challenges. A new paper describes three ways of satisfying them.
January 11, 2022

Airbus charts digital twin path with Capital

Siemens software will be used to accelerated the development of commercial aircraft.
Article  |  Topics: Digital Twin, Blog - Electrical Design  |  Tags: , ,   |  Organizations: ,
December 9, 2021

Flexible hybrid electronics: Making an emerging tech happen with PDKs and reference designs

FHE use-cases are evolving and the NextFlex consortium is looking to smooth their path with a strategy, PDKs and reference modules.
December 6, 2021

DAC 2021 preview: Breker Verification Systems

Breker will highlight its latest work on stress-testing processor, storage and I/O architectures during DAC 2021 this week.