Author Archives: TDF Editor

About TDF Editor

The head honcho
January 21, 2024

Take a deeper dive into BCI-ROM

A new paper looks at examples for using The Boundary Condition Independent Reduced Order Model (BCI-ROM) in its VHDL-AMS implementation for electro-thermal analysis.
Article  |  Topics: Digital/analog implementation, Standards, Verification  |  Tags: , , , ,   |  Organizations:
December 4, 2023

EMA spins off IP, content and services activities

EMA Design Automation to launch sister company, Accelerated Designs, to help clients streamline processes, cut manual effort, and connect data.
Article  |  Topics: Blog - EDA, IP  |  Tags: ,   |  Organizations:
November 20, 2023

Creating the right simulation build flow

What are your options and what is one of the latest simulator features that helps streamline your build?
Article  |  Topics: Blog - EDA, - Verification  |  Tags: ,
November 20, 2023

ETRI builds flow for AI chiplets

South Korea's leading research institute has built a reusable flow for lower power petaflops-performance AI.
Article  |  Topics: Blog - EDA, - HPC, Next Generation Design, Packaging, Verification  |  Tags: , , ,   |  Organizations: , ,
October 24, 2023

Flow evolution for the 3DIC/chiplet age

Chiplet-based 3DIC designs present new challenges for flows that integrate tasks from design exploration to physical verification.
October 9, 2023

ITC 2023 preview: Siemens DIS

From tutorials to technical papers to special 'diamond' sessions, Tessent features large at ITC 2023.
Article  |  Topics: EDA - DFT  |  Tags:   |  Organizations: , , ,
September 28, 2023

Shift left: what it does and how to make it happen

Get to know more on the specific benefits of shift left and how to achieve easy adoption.
July 10, 2023

Siemens fuels custom IC flows with artificial intelligence

Three fast developing AI techniques underpin the efficiencies in the new Solido custom design and verification platform.
June 20, 2023

Maximize manufacturing execution with HPC

Single-device tracking in the chiplet and multi-chip age needs a boost to deliver accuracy and greater production efficiency.
April 25, 2023

Alps Alpine composes capacitance IC with Symphony

The company says the mixed-signal platform enabled a 5X improvement in verification productivity.