Author Archives: TDF Editor

About TDF Editor

The head honcho
December 1, 2022

Siemens aims to simplify compliance for Linux medical devices

New Quality Package focuses on safety and cybersecurity compliance with EU and US medical device standards.
Article  |  Topics: Blog - Embedded  |  Tags: , , , , , , , ,   |  Organizations:
November 23, 2022

Chipletz pushes packaging design for AI, HPC and immersive use-cases

The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
October 6, 2022

Arm adds Corellium expertise for IoT to its Virtual Hardware platform

The start-ups virtualization platform has already been gaining traction in comms and security.
Article  |  Topics: Security, Tool development  |  Tags: , ,
September 8, 2022

Module verification demands integrated DRC and LVS

The system-in-package and module trends in system design promote bringing together physical (DRC) and electrical (LVS) verification.
September 8, 2022

Use equivalence checking to retarget obsolete FPGA designs

Equivalence checking supports the efficient reuse of designs that reside on out-of-date silicon but remain valid in their own right.
September 5, 2022

Parasitic extraction challenges intensify for 5G

5G IC designs have needed aggressive innovation across many elements and more use of FD-SOI that both pose parasitic extraction challenges.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , , , , , ,   |  Organizations:
September 5, 2022

Cybersecurity must be built in not bolted on

Learn how one of the leading tool vendors addresses the security of its products and customer data through a ground-up cybersecurity strategy.
Article  |  Topics: Blog - EDA, - HLS, Tool development  |  Tags: , , , ,   |  Organizations:
April 29, 2022

Navigate variables and lifetimes in SystemVerilog

Variable lifetimes are an apparently basic but also tricky feature within the verification language.
Article  |  Topics: Verification  |  Tags: , , , , ,   |  Organizations: ,
April 28, 2022

Go inside proposals for common chiplet models

Chiplets will need models to guarantee heterogenous SiP implementation. A cross-industry working group describes its progress so far.
April 27, 2022

Verifying the new namespace storage options in NVMe 2.0

The NVMe 2.0 specification has introduced two namespace options that boost SSD performance while optimizing storage life.
Article  |  Topics: Blog - EDA, - Verification  |  Tags: , , , ,   |  Organizations: