28nm

June 10, 2015

TSMC adds Cadence and Imagination subsystems for IoT

Foundry strikes two more Internet of Things subsystem deals for its 55nm ULP process based on Cadence Tensilica and Imagination MIPS/PowerVR cores.
June 8, 2015

DTCO tool aims to squeeze more out of older processes

Gold Standard Simulations (GSS) has launched a tool intended to help fabless chipmakers squeeze more out of existing processes rather than accept the risk and expense of moving to more advanced, finFET-based processes.
Article  |  Topics: Blog - EDA  |  Tags: , , , , , ,   |  Organizations:
June 8, 2015

S3 aims at MIMO WiFi with smaller ADC core

S3 Group has launched the second in a family of low-power successive-approximation ADCs, with a design that supports sample rates up to 320MS/s.
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March 11, 2015

IoT and RF ‘to drive FD-SOI adoption’

The FD-SOI technology developed by CEA-Leti and STMicroelectronics is beginning to gain ground as chipmakers investigate the process as a way to deliver low-energy, wireless-capable SoCs.
Article  |  Topics: Blog - EDA, Embedded  |  Tags: , , , ,   |  Organizations: , ,
March 10, 2015

Cadence reworks implementation for both finFET and older processes

Cadence Design Systems has coupled the parallel-processing techniques behind its recently launched sign-off tools to engines intended to deal with sub-28nm process issues in a suite that reworks the company’s key implementation tools.
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November 12, 2014

Chip tariff eliminated and the big winner is… China?

Not just Intel and TI but also Lenovo and Huawei have cause to welcome end to 25% import tax. And could it even help reinvigorate Chinese start ups?
October 1, 2014

The changes demanded by IoT design

Does the internet of things (IoT) require a change in design techniques? A number of people involved in the EDA industry reckon it does.
September 29, 2014

TSMC adds sub-micron low-leakage processes

TSMC has launched three processes the foundry is aiming at internet-of-things (IoT) and wearable-device designs, providing lower-leakage versions of its 55nm, 40nm and 28nm processes.
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August 13, 2014

Thermal limits challenge Hot Chips power pair

Two of the custom designs presented at the 26th Hot Chips in Cupertino exemplified the problems caused by increasing power density and the benefits of looking at heat removal at the system level.
Article  |  Topics: Blog - EDA, PCB  |  Tags: , , , , ,
July 4, 2014

Qualcomm takes 28nm to China in SMIC deal

Chinese foundry Semiconductor Manufacturing International Corporation (SMIC) is to get a helping hand to develop a production-class 28nm process from Qualcomm Technologies.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: , ,

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