14nm FD-SOI pushes strain and body bias for power savings
At the VLSI Technology Symposium a team led by STMicroelectronics described the techniques used for the upcoming 14nm FD-SOI to boost speed and density over the 28nm version.
28nm
eSilicon to cut costs of ASIC development for IoT, other markets
Online portals enable ASIC designers to explore IP and delivery options, enabling lower-cost markets such as IoT
Chipmaking’s future: all of the nodes all of the time
The stall in Moore's Law caused by the rapid rise in cost of the advanced processes will shift more innovation to mature nodes Monday keynoters at DAC said.
Cadence ports IP and qualifies tools for 28nm FD-SOI
Cadence Design Systems has developed two sets of IP aimed at the 28nm FD-SOI process developed by STMicroelectronics and qualified tools for the process.
Samsung agrees to make 28nm FD-SOI
STMicroelectronics has found an alternative production partner for the FD-SOI process that the European chipmaker is presenting as an easier option for SoC designers.
Common Platform foundry alliance to be wound down
But some research and process collaboration is set to continue in the background as Samsung, GlobalFoundries and IBM chart their own priorities.
ADC design shifts gears for lower power
SAR analog-to-digital converters promise better energy efficiency for a growing range of designs, as S3 Group has found.
Freescale tweaks Cortex-M0+ MCU to squeeze die size down
Freescale Semiconductor has tuned the design of the KL02 microcontroller to produce a new design that is close to 20 per smaller.
Synopsys aims at fast real-time apps with ARC HS family
Synopsys has launched the ARC HS family of configurable-processor cores, using superpipelining to target high-performance embedded applications.
Memory gets smarter for network speedups
Memoir Systems has developed a set of memory controller IP cores that exploit common access patterns used by processors in network switches to improve performance and power consumption
PLATINUM SPONSORS
View All Sponsors