EDA

October 7, 2021

Combined database underpins 3DIC design suite

Cadence has built a unified database to support a group of tools to support the planning and implementation of 3DIC designs.
September 24, 2021

Siemens brings chip-design flow to DARPA Toolbox Initiative

Siemens EDA has become the first of the major EDA vendors to join the DARPA Toolbox Initiative.
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August 31, 2021

Connected cars call for safety islands

A Siemens Tessent white papers examines the role of safety islands in advanced automotive systems.
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August 23, 2021

IEDM 2021 publishes course schedule

Aiming for a primarily physical event in the fall, organisers of the 2021 IEDM have published the tutorial and short-core schedule.
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August 18, 2021

Overcome reset domain crossing challenges when using UPF

A DVCon technical paper addresses potential reset domain crossing metastability issues due to UPF instrumentation.
August 5, 2021

Keynotes for DVCon Europe announced

DVCon Europe has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation
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August 2, 2021

DAC and RISC-V move in together at Moscone in December

DAC and the RISC-V Summit will colocate at Moscone West in December, along with Semicon West.
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July 28, 2021

Automate latchup verification for 3DIC

A Siemens white paper describes a way of automatically deriving information from 2.5D/3DIC designs to streamline latchup design-rules verification.
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July 27, 2021

ST makes its first 200mm SiC wafers

STMicroelectronics has made its first silicon carbide wafers that can be run on a 200mm line.
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July 22, 2021

Cadence uses reinforcement learning to tune flow

Cadence has launched a tool that the company claims can speed up implementation by applying machine learning across the flow.

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