EDA

July 8, 2019

Coventor updates process simulation tool

Coventor has updated its SEMulator virtual-fab tool and added the ability to tune process windows based on simulation results.
July 4, 2019
DVCon US logo (Accellera)

DVCon US and India chapters issue calls for submissions

The Bangalore conference has issued a last-minute call for panel proposals as technical paper submissions for the US edition get set to open next week.
July 3, 2019

How to automate pre-tape-out ESD protection verification

A new paper describes an alternative to increasingly inefficient manual ESD verification that reduces risks of respins and missed delivery deadlines.
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July 2, 2019

The road to ES Design West: Location, location, location

There's still plenty of time to build a busy and profitable agenda for a visit to ES Design West and SEMICON West in San Francisco next week.
July 2, 2019

SmartDV adds verification IP for OpenCAPI data-center standard

The verification IP is the first to become commercially available for the bus interface backed by companies such as AMD, Google, IBM, Micron and Xilinx.
July 2, 2019

Verifying in an HLS context for AI and ML designs

A SystemC/C++ app from a library that extends the OneSpin 360 DV-Verify platform was used by ML IP specialist NanoSemi on a 5G/WiFi project.
June 28, 2019

Mentor looks to AI, cloud and the digital twin

Mentor's Joe Sawicki talks to TDF about the growing importance of system-level simulation and the long-term impact of AI and cloud on EDA.
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June 28, 2019

The road to ES Design West: Cloud-based implementation

Moving design and verification activities into the cloud poses challenges. Next month's inaugural ES Design West will offer practical guidance.
June 27, 2019

Building an ecosystem around HLS for AI and ML designs

Mentor's AI Accelerator Ecosystem adds reference designs, libraries and other forms of support around its Catapult HLS platform.
June 20, 2019

The road to ES Design West: Systems

ES Design West was created to reflect integration, even elision of tasks across the semiconductor supply chain. Here's how the program reflects the trend.

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