Keynotes for DVCon Europe announced

By Chris Edwards |  No Comments  |  Posted: August 5, 2021
Topics/Categories: Blog - EDA  |  Tags: , , , ,  | Organizations: ,

The Design and Verification Conference & Exhibition Europe (DVCon Europe) has announced its first two keynote speakers, who will cover the topics of AI and the role of virtualisation in ADAS design and implementation.

The speakers at the Accellera-sponsored event in late October will be be Rashid Attar, vice president of engineering at Qualcomm Technologies, and Satish Sundaresan, managing director of Elektrobit India.

Rashid Attar’s keynote is titled “The Future of Hardware Innovations for AI Systems”. Satish Sundaresan will present “Take a Leap: Virtualization in Future Development”. Between them, the two presentations will discuss the increasing technical capabilities for autonomous driving and examine how engineering teams should embrace virtualization.

Sumit Jha, general chair of DVCon Europe, said, “Inspiring and intriguing keynotes from industry leaders have been one of the main attractions at DVCon Europe over the years. We are very pleased to have Rashid and Satish on board and it will be great to get their insights into these trending topics.”

Rashid Attar joined Qualcomm in 1996 and is head of the ASIC and hardware research and development department, focusing on 5G and beyond RF, ultra-low power processors, computational accelerators, and antenna systems. He is also head of engineering for Qualcomm’s cloud/edge AI-inference accelerator program. He holds almost 200 US patents.

Satish Sundaresan heads Elektrobit India’s subsidiary based in Bengaluru. The India centre is a research and development location for Elektrobit and Sundaresan also heads a global product development team in the validation space for ADAS.

The 2021 conference will include virtual papers, tutorials and panels focused on sharing best practices and industrial application of design and verification methodologies, languages and standards in areas such as: system-level and software design; model-based and model-supported software design; verification and validation; IP reuse and design automation; functional safety and security; and mixed-signal and low-power design and verification. The conference takes place on October 26 and 27, 2021, with SystemC Evolution Day following on October 28.

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