Assessing the true cost of node transitions
John Ferguson reviews the key capital metrics you need to review when deciding whether to move to a new process.
Foundry
Silicon photonics moves out of the shadows
An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
How Applied Materials and fab partners are harnessing machine learning
The equipment giant's Computational Process Control strategy takes a pragmatic approach to Industry 4.0 and is likely to influence EDA tools for incoming nodes.
Six ways to exploit the advantages of finFETs
FinFET processes and libraries are maturing, enabling designers to explore the best ways to take advantage of the capabilities of the new transistor design
Cadence’s path to digital implementation on 10nm
The 10nm process will see changes to multiple patterning that demands changes in the implementation flow, along with an increased focus on the effects of variability.
Mounting Fiji: How AMD realized the first volume interposer
AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
Lessons learned in the finFET trenches
In sessions at the 2015 Design Automation Conference, engineers who had worked on finFET-oriented projects revealed how the technology has changed their design practices and where others may want to think twice about making the move.
ARM, TSMC design explores 16nm finFET issues
ARM and TSMC used an extensive pre-planning process, including a static analysis of each module's overall logic structure, to put together a 2.3GHz processor design based around ARM's main 64bit Big.Little pairing for the foundry's 16nm finFET process.
Using optimized design flows to meet PPA goals for SoC processor cores
How tuning a design flow can help optimize SoC processor cores for power, performance and area - and make it possible to do different optimisations for different cores on the same SoC.
Design enablement and entitlement for 14/16nm finFET processes
How EDA tools are evolving to make it possible to design with finFET processes.