September 14, 2017
An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
March 22, 2017
The equipment giant's Computational Process Control strategy takes a pragmatic approach to Industry 4.0 and is likely to influence EDA tools for incoming nodes.
November 29, 2016
FinFET processes and libraries are maturing, enabling designers to explore the best ways to take advantage of the capabilities of the new transistor design
October 29, 2015
The 10nm process will see changes to multiple patterning that demands changes in the implementation flow, along with an increased focus on the effects of variability.
September 23, 2015
AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
July 20, 2015
In sessions at the 2015 Design Automation Conference, engineers who had worked on finFET-oriented projects revealed how the technology has changed their design practices and where others may want to think twice about making the move.
October 6, 2014
ARM and TSMC used an extensive pre-planning process, including a static analysis of each module's overall logic structure, to put together a 2.3GHz processor design based around ARM's main 64bit Big.Little pairing for the foundry's 16nm finFET process.
September 18, 2014
How tuning a design flow can help optimize SoC processor cores for power, performance and area - and make it possible to do different optimisations for different cores on the same SoC.
September 2, 2014
How EDA tools are evolving to make it possible to design with finFET processes.
August 27, 2014
Moving to a finFET process means considering process readiness, cost and yield, as well as the traditional power, performance and area advantages