Cisco Archives - Tech Design Forum Techniques

September 14, 2017

Silicon photonics moves out of the shadows

An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.

Article | Topics: EDA - DFM, IC Implementation, Verification | Tags: 5G, AI, data center, DFM, foundry, HPC, internet of things, layout, networking, physical verification, server, silicon photonics | Organizations: Amkor, Cisco, GlobalFoundries, Huawei, IBM, Intel, Luxtera, PhoeniX Software, Siemens EDA, ST Microelectronics, TSMC

June 10, 2014

Zeroing in on the problems of fast board-level interconnect

A panel session at DAC 2014 focused on the problems of high-speed, board-level interconnect and the roles of codesign and power integrity in solving them.

Article | Topics: PCB - Design Integrity, EDA - IC Implementation | Tags: advanced packaging, DAC 2014, finFET, high-density interconnect, power integrity, Serial IO, signal integrity | Organizations: Altera, Cadence Design Systems, Cisco, GlobalFoundries, Intel

July 19, 2013

Eliminating iterations in gigahertz ASIC handoff

How Cisco eliminated iterations in the ASIC handoff of a gigahertz networking chip by using physically aware synthesis

Article | Topics: IP - Assembly & Integration, EDA - IC Implementation | Tags: 28nm and below, ASIC handoff, physical synthesis, routing, synthesis | Organizations: Cisco, Synopsys

Cisco

Silicon photonics moves out of the shadows

Zeroing in on the problems of fast board-level interconnect

Eliminating iterations in gigahertz ASIC handoff

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