Synopsys

March 19, 2019

Using advanced IP to build SoCs for hyperscale data centres

SoC suppliers building the key components for hyperscale data centres need access to the latest IP to handle functions such as PCIe, DDR5, cache coherency, NVMe SSDs, and the highest-bandwidth Ethernet implementations.
Article  |  Topics: IP - Selection  |  Tags: , , , ,   |  Organizations:
March 15, 2019

Enabling the move to a system-centric view

Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.
February 6, 2019

Low-power debugging made easy

UPF provides a useful way to describe the power-management strategies that should be applied to a design, but using it introduces a number of challenges during low-power debugging.
Article  |  Topics: EDA - Verification  |  Tags: , ,   |  Organizations:
January 25, 2019

Optimizing the hardware implementation of machine learning algorithms

Optimizing the way in which machine learning algorithms are implemented in hardware will be a major differentiator for SoCs, especially for edge devices.
December 14, 2018

The antifuse advantage for one-time programmable non-volatile memory

Antifuse-based OTP NVM is highly scalable, has the area efficiency to enable macros  of megabit capacities, and offers low read power.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:
December 3, 2018
Rahul Chirania is a staff applications engineer with the static verification team at Synopsys.

Verifying clock domain crossings in UPF-based low-power SoCs

The verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs.
Expert Insight  |  Topics: EDA - Verification  |  Tags: , , , ,   |  Organizations:
November 5, 2018
Morten Christiansen is technical marketing manager for Synopsys’ DesignWare USB and DisplayPort IP.

Understanding USB 3.2 and Type-C

The basics of USB 3.2, how to implement it in an SoC, and how USB Type-C connectors and cables are used in USB 3.2 systems.
Expert Insight  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , ,   |  Organizations:
October 16, 2018
Dana Neustadter is a senior manager of product marketing for Synopsys’ Security IP solutions.

Why AI needs security

As AI becomes pervasive in computing applications, so too does the need for high-grade security in all levels of the system.
Expert Insight  |  Topics: IP - Selection  |  Tags: , ,   |  Organizations:
October 9, 2018

Using threat models and risk assessments to define device security requirements

The proliferation of attacks against embedded systems is making designers realize that they need to do more to secure their products and ecosystems.
Article  |  Topics: Embedded - Architecture & Design, IP - Selection  |  Tags: , , ,   |  Organizations:
October 3, 2018
Allen Watson of Synopsys

An open-source framework for greater flexibility in machine-learning development

Exchange frameworks are emerging to make it easier for neural-network developers to swap between development environments.
Expert Insight  |  Topics: Embedded - Architecture & Design, EDA - ESL  |  Tags: , , ,   |  Organizations: , , , , ,

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors