An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
In both data centers and automobiles deep learning is taking hold. But it is a technique that challenges conventional microprocessors, leading system designers to look at alternative architectures for acceleration.
Using equivalence checking to validate ECOs in ARM core subsystem development at STMicroelectronics
How ST Microelectronics uses Synopsys' VCS AMS, combining VCS functional verification and CustomSim, to verify one of its mixed-signal designs
20nm test needs new approaches to cope with short delay defects, new memory failure mechanisms and the consequences of test compression strategies
Intel says ‘trigate’—finFET to others—but depleted silicon-on-insulator also has its post 22nm supporters. Chris Edwards reports on the debate at 2011’s Semicon West.
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