DFM

September 14, 2017
Featured image - Silicon photonics

Silicon photonics moves out of the shadows

An alphabet soup of AI, HPC, 5G and the IoT has finally seeded creation of a design infrastructure for silicon photonics.
December 29, 2016
Danit Atar is a senior marketing programs specialist at Mentor Graphics

A reliability checklist for the Connected World

Reliability is growing to match security as a key challenge for PCB design. These tools and techniques will help you rise to it.
April 3, 2014
Joe Kwan is the Product Marketing Manager for Calibre LFD and Calibre DFM Services at Mentor Graphics.

Standard cell IP must pass the litho-friendly routing test

Lithography is only just beginning to play a role in cell IP selection but early analysis already matters.
October 11, 2012
Tong Gao

The physical design challenges of 20nm processes

Manufacturability, routing, library design and more - it all needs rethinking at 20nm, writes Tong Gao of Synopsys.
Expert Insight  |  Topics: EDA - DFM  |  Tags: , , , ,   |  Organizations:
September 12, 2012

Critical tools for 20nm design

A look at the way in which key tools, in IC implementation, modeling and extraction, and physical verification, are developing in response to the challenges of 20nm design
May 22, 2012
Jeff Wilson

Making dummy fill smarter

Guest blogger Jeff Wilson discusses some of the subtleties involved in the effective use of dummy fill in deep sub-micron IC designs.
Expert Insight  |  Topics: EDA - DFM  |  Tags: ,   |  Organizations:
May 22, 2012

Effective finger-pointing: the art of modern yield analysis

Correlating production test failure diagnosis with DFM analysis can help identify and understand systematic yield issues, and to find out whether they are linked to DFM violations.
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December 14, 2010

Bringing fabless players into manufacturing research

Sematech, the leading research consortium for semiconductor manufacturing, has launched a campaign to recruit members from the fabless sector. The move reflects the importance of making manufacturing decisions earlier in the design flow, and is also intended to get input from designers on implementations of such technologies as 3D interconnects, next-generation lithography and novel materials/structures.
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September 10, 2010

Overcoming manufacturing challenges in MEMS

Microelectromechanical systems (MEMS) manufacturing continues to be dogged by a technologically and economically inefficient landscape where too many products demand their own bespoke processes and packages. However, the last three years have seen third-party foundries gain more influence over the sector, bringing greater demands for reuse and DFM considerations, earlier in the design flow. The [...]
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June 1, 2010

Signoff-driven IC design

The demands of manufacturing closure at advanced process nodes make the traditional design-then-fix flow unmanageable. At 28nm and below, designers need a solution that can address manufacturing issues at any point in the design process, enabling a true correct-by-construction methodology. An effective solution must provide design-rule-check and design-for-manufacturing analysis using the actual foundry-approved signoff rules [...]
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