lithography

September 3, 2021
Silicon Photonics - Verification - featim - sep21

Silicon photonics verification: Progress through adaptation

SiP promises advances in transmission speeds, bandwidth, accuracy and low power but verification requires careful evolution of existing tools.
December 31, 2018
MBH featured image

Enhanced model-based hinting may be the edge you need below 20nm

A detailed dive into how MBH strategies for litho hotspots have been enhanced to deal with double patterning at 20nm and below.
September 11, 2018
Gandharv Bhatara is the product marketing manager for the Calibre OPC/RET products at Mentor, a Siemens Business.

EUV’s arrival demands a new resolution enhancement flow

Gandharv Bhatara looks at how the OPC and RET elements of Calibre are getting ready for the EUV age.
Expert Insight  |  Topics: EDA - DFM, - EDA Topics  |  Tags: , , , , , , ,   |  Organizations: , ,
February 1, 2018
Design space exploration feature

Design space exploration finds hotspots during early process development

A new technique has been developed to catch potential new lithography issues when little design data is available for incoming nodes.
October 27, 2017
Featured image - double patterning at advanced nodes

Catch multi-patterning errors clearly at advanced nodes

How to address increasingly complex patterning issues and debug them efficiently as design moves toward 12 and 10nm.
Article  |  Topics: EDA - DFM, - EDA Topics, EDA - Verification  |  Tags: , , , , , ,   |  Organizations:
August 30, 2017
DTCO for early lithography issue identification - featured image

Your next node: find lithography issues early with DTCO

Pattern-based design/technology co-optimization (DTCO) estimates lithographic difficulty during the early stages of a new process technology node.
Article  |  Topics: EDA - DFM, Verification  |  Tags: , ,   |  Organizations:
March 22, 2017
Computational Process Control feature

How Applied Materials and fab partners are harnessing machine learning

The equipment giant's Computational Process Control strategy takes a pragmatic approach to Industry 4.0 and is likely to influence EDA tools for incoming nodes.
March 26, 2015

A review of model development for 10nm lithography

John Sturtevant looks at ongoing preparations for the incoming node and charts significant progress that has already been made.
Article  |  Topics: EDA - DFM  |  Tags: , ,   |  Organizations: , ,
January 26, 2015
Silicon Photonics litho featured image

How lithography simulations enable silicon photonics

Precise curved geometries are vital to making this emerging and cost-effective CMOS-based technology work. This primer explains its advantages and how litho tools are evolving to meet the challenges it presents.
August 12, 2014
Joe Kwan is the Product Marketing Manager for Calibre LFD and Calibre DFM Services at Mentor Graphics.

Sign-off lithography simulation and multi-patterning must play well together

Sign-off lithography verification is vital as we move beyond double to multi-patterning but changing responsibilities in the flow must be handed with care.

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