Mentor

April 15, 2019
Critical Area Analysis Feature - Featured Image

How critical area analysis improves yield

CAA is a valuable tool available to both design engineers and foundries to help them avoid layout-dependent effects during manufacturing.
Article  |  Topics: EDA - DFM  |  Tags: , , , , ,   |  Organizations:
April 2, 2019

High-level synthesis for AI: Part Two

How Chips&Media used HLS on the development of a computer vision IP block.
March 26, 2019

High-level synthesis for AI: Part One

The computational and algorithmic demands made by computer vision systems highlight HLS' value for AI system development.
March 25, 2019
Voltage-aware DRC featured image

Use evolving DRC to automate high-voltage and multi-power domain verification

Automated voltage-aware DRC addresses the reliability verification challenges in today’s high-voltage and multiple power domain applications.
Article  |  Topics: EDA - DFM, Verification  |  Tags: , , , ,   |  Organizations:
March 15, 2019

Enabling the move to a system-centric view

Bob Smith of the ESD Alliance describes how we can promote the ongoing evolution of the design ecosystem.
March 13, 2019
Liberty Variation Format - Featured Image

Validating on-chip variation: Is your library’s LVF data correct?

Machine learning techniques help ensure the validity of Liberty Variation Format information for OCV analysis at lower process nodes.
February 27, 2019

Practical mixed-signal defect and fault injection automation and simulation

This defect and fault injection primer looks at how to standardize definitions, decide injection volume, measure activity, manage simulation, optimize test time and more.
February 8, 2019
Featured image - Layout merging feature

Fast, accurate layout merging for SoC flows

How to achieve efficient merging of data from formats such as OASIS, GDS, and OpenAccess to ensure timely verification through DRC runs.
Article  |  Topics: EDA - DFM, Verification  |  Tags: , , , , , ,   |  Organizations:
January 28, 2019

Emulation for AI: Part Two

The second part of this feature looks at how Wave Computing's objectives with its dataflow processing unit for AI mapped to the use of emulation in its development.
January 25, 2019

Emulation for AI: Part One

An increasing number of AI players are building their own silicon and finding that emulation is key to overcoming the major challenges.

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