An Open Compute Project group working on multichip integration sees a combination of parallel and serial interfaces being important for interchip communication.
Not only has Microsoft decided to make a compression algorithm intended for data centers open source, the company the company is providing its own RTL to anyone who wants to implement it in silicon.
The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
MACOM has decided to use GlobalFoundries' 90nm SOI process on 300mm wafers to build higher-integration optical-switching devices for servers.
Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.
Faster PHYs needed to shift vast amounts of data around giant data centres.
ARM is using technologies such as Hadoop and Spark to provide insight into how well its verification processes are working.
A licensing deal with GlobalFoundries has provided chipmaker Aquantia with the ability to speed up development of a 100Gbit/s link technology for data centers.
Achronix has decided to offer the FPGA technology it has developed as a set of embeddable cores.
Cadence Design Systems has released a set of ten verification IP packages intended to support a new crop of standard protocols.
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