Vertical structures to debut at IEDM 2015
A novel approach to 3D NAND will be among the presentations at the International Electron Device Meeting to be held in Washington, DC in December.
EDA
Tanner EDA @ Mentor Graphics: Steady as she goes
Stability is the watchword as AMS and MEMS specialist Tanner retains much of its independence - a 'start-up with a billion-dollar company behind us'.
DVCon Europe initial technical program unveiled
DVCon Europe has published the technical program for its upcoming November conference in Munich, Germany.
Early registration opens for DVCon Europe 2015
Early registration has opened for the DVCon Europe conference to be held in Munich, Germany in November.
Flow exploration key to finFET network processor implementation
Flow exploration helps designers establish best approach to advanced network processor implementation on Samsung finFET process
10nm flow reveals complexity of finFET design process
Collaboration between ARM, TSMC and Synopsys reveals challenges of 10nm finFET design flows.
Samsung applies early prediction and color management to 10nm plans
Rapid virtual prototyping and a metal stack that's more designer friendly are two of the ways in which Samsung aims to build up foundry market share for its 14nm and 10nm finFET processes.
GlobalFoundries tunes 28nm for smaller, lower-power FD-SOI
GlobalFoundries has developed variants of the 28nm FD-SOI process that offer smaller die sizes and lower-power operation.
IBM and friends at 7nm: breakthrough or science project?
IBM, GlobalFoundries, Samsung and SUNY deserve kudos for manufacturing the first 7nm chip but the NREs involved still look frightening.
Remembering Gary Smith
The leading EDA analyst passed away late last week after a short illness. Graham Bell offers this remembrance.
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