November 16, 2015
Cadence Design Systems has designed its Palladium Z1 emulator to fit into the corporate data-center, improving virtualization and availability aspects of the system’s design.
November 12, 2015
But the bridge standard's European backers still need greater support from the big EDA vendors.
November 12, 2015
High powered alliance develops TLM standards to address growing automotive and IoT concerns.
October 20, 2015
ARM has moved back into system-level modelling with the decision to buy the tools and models developed by Carbon Design Systems
October 19, 2015
Vendor adds verification support for 25G, 50G and 100G Ethernet through emulator-based virtualization.
October 12, 2015
...and why the semiconductor industry hasn't been singularitied down to one MegaSemis Inc even if that's what M&A data suggests.
October 9, 2015
IMEC and Cadence have taped out a test chip intended to explore key lithography and metal-interconnect issues that will face users of the forthcoming 5nm process node.
October 8, 2015
Tech Design Forum talked to the general and program chairs of DVCon Europe about the conference and how it seeks to show the expansion of IC verification methodologies to the system level.
October 6, 2015
Samsung bases PRISM and FLARE defect analysis and optimization on Mentor Graphics' Calibre and Tessent. Yields rise. Ramps shorten.
September 30, 2015
A novel approach to 3D NAND will be among the presentations at the International Electron Device Meeting to be held in Washington, DC in December.