July 20, 2020
Mentor adds Analog FastSPICE eXTreme innovations for designs facing increasing parasitic complexity and contact resistance challenges at cutting edge nodes.
July 20, 2020
Mentor has released a tool that attempts to deal with the problems encountered in the use of physical circuit verification in the early stages of SoC integration.
July 20, 2020
At DAC this week, Verifyter is offering a limited number of companies free six-month licences of its regression-analysis tool Pindown.
July 13, 2020
Heterogeneous integration has the potential to overcome the yield and cost challenges presented by the growing headwinds associated with process scaling. But it may take a dramatic rethink in design approaches.
July 8, 2020
In a panel session at VLSI Symposia, AMD described how the economics have come down strongly in favor of multichip integration for multicore server processors.
July 7, 2020
The organizers of DVCon Europe have decided to turn the autumn verification conference into a virtual event this year.
July 1, 2020
Sigasi has launched a software kit to provide inhouse tools builders and EDA vendors with a way to build in code-editing features.
June 24, 2020
The organizers of the 66th annual IEDM have decided to hold the December conference virtually.
June 18, 2020
Waferscale SSDs are among the future drive architectures being explored by Kioxia, according to a keynote delivered at VLSI Symposia.
June 18, 2020
Even experienced IC design houses must adopt innovative and emerging strategies to meet functional safety and other demands of ISO 26262 for automotive systems.