FastSPICE upgrade boosts nano-scale analog verification by up to 10X

By Paul Dempsey |  No Comments  |  Posted: July 20, 2020
Topics/Categories: Digital/analog implementation, Blog - EDA, - Verification  |  Tags: , , , , , , ,  | Organizations: ,

Mentor, a Siemens business, has added ‘eXTreme’ technology to raise the performance of its Analog FastSPICE Platform  (AFS) by as much as an order of magnitude.

The enhancements, available free of charge to the platform’s existing users, include upgraded resistor-capacitor (RC) circuit reduction algorithms, performance improvements to the AFS core SPICE matrix solver, and full-spectrum device noise analysis capabilities for silicon-accurate simulation.

The company says that Analog FastSPICE eXTreme has 10X better simulation performance against its previous generation and “a 3X simulation performance acceleration compared to commercially available solutions at similar accuracy settings”.

Figure 1. Analog FastSPICE eXTreme at a glance (Mentor)

Figure 1. Analog FastSPICE eXTreme at a glance (Mentor)

The new features and improvements are particularly aimed at analog circuitry that is encountering progressively greater levels of parasitic complexity and contact resistance at cutting-edge process geometries. The overall AFS platform is already foundry-certified to 5nm, but pathfinder users of the eXTreme version have already been looking to go beyond that.

Silicon Creations, develops IP for high-performance clocking low-power/high-speed data interfaces. Randy Caplan, executive vice president, explained, “Our designs are included in the most advanced systems-on-chip and therefore must target the latest FinFET geometries down to 3nm. Therefore, it is imperative we are able to simulate FinFET designs quickly and accurately to meet our aggressive schedules.”

Analog FastSPICE eXTreme complements Mentor’s Symphony Mixed-Signal Platform for the verification, debug and configuration of complex, nanometer-scale mixed-signal ICs. It uses the AFS circuit simulator with the aim of providing fast and accurate mixed-signal verification on industry-standard HDL simulators.

“As analog, mixed-signal, and RF designs continue to advance into deep nanometer nodes, designers worldwide are demanding that circuit simulation performance improves significantly without compromising accuracy in the advanced nodes,” said Dr Ravi Subramanian, senior vice president, IC Verification Solutions for Mentor.

Subramanian added that his company sees eXTreme as “the next big chapter in our evolution”.

 

Leave a Comment

PLATINUM SPONSORS

Synopsys Cadence Design Systems Mentor - A Siemens Business
View All Sponsors