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VLSI 2017
VLSI 2017
June 18, 2017
Samsung 7nm uses EUV and split fin widths to push speeds
EUV and fin optimization help build Samsung's upcoming 7nm process, the company discloses at the VLSI Technology Symposium.
Article | Topics:
Blog - EDA
| Tags:
10nm
,
7nm
,
EUV
,
finFET
,
VLSI 2017
| Organizations:
Samsung Electronics
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