The first in a series of articles on how various vendors are addressing the flow's most challenging task looks at Mentor's strategy for emulation.
EDA giant cites high-level synthesis' move into the mainstream as driven by IP integration challenges in striking deal for the HLS market leader.
Glass may be the high frequency interposer option given silicon concerns about power and noise. TSMC adds another pathfinder to its 3D arsenal.
Industry-wide innovation is required to make scaling cost-effective at 7nm, says Qualcomm's VP of Technology. Time for a fat, cholesterol and MSG-free diet.
A leading researcher argues that graphene will not replace but complement silicon and thrive in specialist applications.
TSMC stays the course with new co-CEOs as Morris Chang retains executive leadership for now while finFET, 3D and other new technologies settle in.
Research projects to verify methodologies, address third-party integration challenges and add a low-cost interposer-like technology to the 3D-IC family make their mark.
Dr Ron Black also discussed his experiences with the Internet of Things in a lively keynote at the GSA Memory+ Conference in Taipei
Stacked 3D-IC memory-on-logic is on the packaging company's roadmap, but there are still yield hurdles to scale at the MEOL.
The Indian government will meet up to a quarter of initial capital costs for a foundry capable of nodes up to 45nm and 40,000 wafer starts per month at 300mm.
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