Coverage without tears
A technical paper originally presented at DVCon USA 2020 simplifies the creation of coverage strategies using manual, automated and verification IP components.
DVCon US
DVCon US 2020 preview: SmartDV
The latest in MIPI and DDR design and verification IP as well as protocol debug are highlights in SmartDV's DVCon program.
Master the design and verification of next gen transport: Part Four – emulation
Emulation is already playing a vital role in advanced automotive design within a digital twin environment.
Master the design and verification of next gen transport: Part Three – functional safety
The third part of this series takes the original CNN demonstrator through a full ISO 26262 type functional safety workflow
Master the design and verification of next gen transport: Part Two – high-level synthesis
An object classification demonstrator shows how high-level synthesis (HLS) can speed the delivery and exploration of automotive design.
DVCon US and India chapters issue calls for submissions
The Bangalore conference has issued a last-minute call for panel proposals as technical paper submissions for the US edition get set to open next week.