December 12, 2022
Ahead of the RISC-V Summit in San Jose, Imperas Software has issued updates to its ImperasDV verification IP for RISC-V verification and Codasip has launched a secure-processor initiative.
December 9, 2022
Adding an MOL layer that takes advantage of a self-aligned pitch-splitting technique and a rotated layout could cut standard-cell height to 4T.
December 5, 2022
Imec has developed a high-endurance ferroelectric capacitor that could form the basis of storag-class embedded and standalone memories.
December 1, 2022
The key to exploiting AI is being clear about where its family of technologies can help to improve and democratize design.
December 1, 2022
New Quality Package focuses on safety and cybersecurity compliance with EU and US medical device standards.
November 23, 2022
The Austin-based start-up used Siemens EDA software to deploy a cutting-edge Smart Substrate based on advanced packaging technology.
November 21, 2022
Aside from the keynotes and technical papers, the networking at an event like DVCon Europe provides a way to keep open-source EDA on the road.
November 15, 2022
Real Intent has developed a tool to check design and the potential for circuits to glitch.
November 14, 2022
Semiwise has developed transistor models for the GlobalFoundries 22FDX that cover operation at cryogenic temperatures.
October 25, 2022
DVCon Europe's keynotes will examine verification issues in connected cars and 5G networks.