Author Archives: Chris Edwards

About Chris Edwards

Chris Edwards has spent a long time covering electronics and EDA. He is a former Editor-in-Chief of Electronic Engineering Times UK and electronics editor of the IET's Engineering & Technology. His work has appeared in a variety of international newspapers including The Guardian, The Daily Telegraph, The Age and the South China Morning Post.
April 17, 2023

Semidynamics pushes configurability on RISC-V core for HPC

Processor IP company will incorporate custom instructions and other changes in its superscalar core, which includes a novel memory unit for sparse matrices.
Article  |  Topics: Blog - IP  |  Tags: , , ,   |  Organizations: ,
April 17, 2023

DVCon Europe adds research track

DVCon Europe is expanding coverage into research on design verification for its 10th conference later this year.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations:
April 13, 2023

Arm signs sub-2nm deal with Intel foundry operation

Intel Foundry Services has signed a deal with Arm that will see the two companies work on a program of system and design-technology co-optimization.
Article  |  Topics: Blog - IP  |  Tags: , , , , , ,   |  Organizations: ,
April 6, 2023

Cadence adds AI to PCB design

Cadence Design Systems has expanded its use of machine learning for EDA into PCB design, joining a growing number of suppliers who have decided it is a sector that needs the AI treatment.
Article  |  Topics: Blog - PCB  |  Tags: , , , ,   |  Organizations:
April 4, 2023

Curvilinear layout looks to wider adoption with mask speedups

Nvidia's move into software aimed at mask production and EDA looks to be part of a wider shift to improve yields.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: , , ,
March 30, 2023

SEMI predicts strong 300mm growth to 2026

SEMI predicts 300mm capacity to grow to almost 10,000 wafers per month in 2026, up from 6,500 in 2021.
Article  |  Topics: Blog - EDA  |  Tags: , ,   |  Organizations:
February 28, 2023

Imperas and Synopsys team on RISC-V debug

Imperas is integrating its ImperasDV verification IP with the VCS simulator and Verdi debug tools.
Article  |  Topics: Blog - EDA, IP  |  Tags: , ,   |  Organizations: ,
January 18, 2023

Accellera forms CDC working group and takes security standard to IEEE

Accellera has formed a clock-domain crossing working group and has also passed its security-annotation standard to the IEEE.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , ,   |  Organizations: ,
January 6, 2023

DVCon Europe best paper speeds up memory-controller tests

The winner of the best-paper award at DVCon Europe went to a team from Samsung based in India, describing their work on a reusable agent for testing the behavior of error-correcting memory circuits.
Article  |  Topics: Blog - EDA, IP  |  Tags: , , , ,   |  Organizations: ,
January 4, 2023

A*Star lays out SiP applications choices at IEDM

The choices for heterogeneous integration are falling into three main families, demonstrated by A*Star at IEDM 2022.
Article  |  Topics: Blog - EDA  |  Tags: , , , ,   |  Organizations: