Chipmaker

GlobalFoundries has signed deals to let the foundry offer power-saving clocks, a massively parallel floating-point processor and interface IP from Rambus. They are "uncommon solutions" to come from a foundry, the company claims.

GlobalFoundries and Samsung described how they are readying finFETs for production at CPTF 2013 and how the 28nm processes will have a long shelf life.

Cadence Design Systems has built into its latest Virtuoso update features designed to tackle the problems of working with the 20nm generation of processes with finer control over layout-dependent effects, double patterning and new types of local interconnect.

14nm finFET test-chip designs are moving through Samsung's fab as ARM, Cadence Design Systems and Synopsys continue to check their flows on the new process.

3D-IC integration techniques such as the use of TSVs, die stacking and interposers are unlikely to limit performance, according to research from TSMC and IBM

Altera has cut a deal with ARM to bring unified debug support to the FPGA fabric and Cortex-A9 processors inside the Cyclone SoC products, using a specialized version of ARM’s DS5 tool.

Intel has launched its first server SoC, based on a stripped-down Atom, in a bid to seal its place in microservers before ARM can ready its 64bit architecture for production. But the chip seems more a stake in the ground than the answer for low-power servers.

Can planar devices on fully depleted SOI resist the relentless rise of finFETs as the next device architecture of choice for the semiconductor industry? An evening panel at IEDM explored the trade-offs

Semiconductor process options outlined at IEDM by Luc van den Hove of imec as industry faces hard choices and rising costs

Mears Technologies and UC Berkeley describe at IEDM 2012 how oxygen in a silicon superlattice could boost performance beyond strained silicon at 14nm.