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Teledyne e2v has demonstrated a prototype optical link that the company believes could replace electrical signaling for remote RF heads.

As the project that funded OpenRoad draws to a close, experts pondered its wider future at the 59th DAC.

Three EDA vendors team up to create stronger verification flow for RISC-V processor implementations.

Siemens has launched Calibre DRC engines that make it easier to perform useful checks early in the layout process.

Cadence president expects expanded role for reinforcement learning in tool portfolio and looks for help on AI for verification.

Siemens EDA has launched a second version of its Symphony simulation environment designed to support quicker debug cycles.

Aki Fujimura of mask specialist D2S sees curved shapes as key to improving die yield and performance but it needs EDA support.

The ESD Alliance is hosting a panel and networking event at next week's colocated Design Automation Conference and SEMICON West.

Breker's presence at next week's Design Automation Conference (DAC) will emphasize a new collaboration around the RISC-V platform.

Axiomise founder and formal expert Ashish Darbari will present across multiple events at DAC in San Francisco next week.