The road to ES Design West: Systems

By TDF Editor |  No Comments  |  Posted: June 20, 2019
Topics/Categories: Conferences, Blog - EDA, - General  |  Tags: , , , ,  | Organizations: , , , , , , , ,

Next month’s ES Design West has been collocated with SEMICON West in San Francisco (July 9-11) to reflect the deepening integration of EDA and IP within the semiconductor supply chain, and thereby extend their outreach to the system-oriented and other companies that are creating a new wave of business – from the FANGs and BATs of social media and e-commerce to leading automotive OEMs and Industry 4.0 players.

“Semiconductor process design and manufacturing are now highly interrelated, due to tightening specifications and increased process complexity at advanced nodes,” says David Fried, vice president of virtual fabrication specialist Coventor. The show’s focus on this convinced the Lam Research company to participate.

Meanwhile from an IP point of view, Arm has taken much the same view. “As design and manufacturing draw closer together, the co-location of ES Design West and SEMICON West gives the ecosystem one place that will bring together the entire electronics supply chain into one supercharged event,” explains Kelvin Low, vice president of its physical design group.

Other global SEMICON events have already begun to see increasing number of attendees from the design community. The launch of ES Design West (as well as future integration with DAC) are expected to accelerate the trend..

“When I spoke at SEMICON Japan earlier this year, I was impressed by the audience that attended the show. It reinforced my expectation that exhibiting at ES Design West was a good decision,” says Dean Drako, president and CEO of IC Manage.

These benefits have to run in both directions. Design/EDA-led attendees will be looking for a chance not only to visit existing suppliers and partners in their own fields, but also to check out less familiar names that are having an increasing influence upon them.

System-level analysis

The general need to broaden perspectives throughout the semiconductor design chain is evident in the program, especially its research strands.

The Smart Markets (registration fee) symposium on Monday, July 8 features analysts from companies such as Gartner, McKinsey, Yole, Objective Analysis and TechSearch as well as SEMI itself. They will address trends in segments such as AI, memory, 5G and automotive. The session is an opportunity to see how the industry’s growth prospects look from the manufacturing side. Then, Richard Wawrzyniak, Principal Analyst with Semico Research, will offer a more EDA and design-based perspective in an AI-themed TechTALK on Tuesday, July 9.

Within ES Design West itself, the need to take a higher overview of design processes will also be a theme within the event’s Design Pavillion session on ‘Advanced Applications’ on Thursday, July 11.

One highlight will be a presentation by Balachandran Rajendran, CTO EDA for Dell EMC, on the ‘Holistic Cost of Design’. An earlier version of this talk that he gave during SEMICON China was one of the more provocative and engaging during the event. In the same session, Arm’s Tim Heighway, a principal application engineer, will also offer a perspective on SoC design complexity.

However, it’s worth noting that the same strand will address major verification challenges with presentations from Real Intent, Silvaco and Smart DV about static, statistical analysis and verification IP, respectively.

The supply chain is eliding, but the tasks within it remain as important as ever. The goal is to develop a balanced view of both macro and micro trends. It helps if you can work towards that at one event.

ES Design West takes place in the Moscone Center South Hall, July 9-11. Access is free to SEMICON West Expo and All-in Pass holders. Registration for ES Design West is available here.

Our earlier ES Design West preview on AI-related activities can be found here.

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