Synopsys UFS 3.0 IP doubles bandwidth to flash

By Luke Collins |  No Comments  |  Posted: February 27, 2018
Topics/Categories: Blog - IP, - Product  |  Tags: , ,  | Organizations: , ,

Synopsys has launched a Universal Flash Storage (UFS) IP solution that meets the latest JEDEC UFS 3.0 standard. It should help designers meet the stringent storage requirements of the mobile, digital camera, drone, advanced laptop, and automotive sectors.

The DesignWare UFS 3.0 IP solution includes the UFS controller V3.0, the MIPI UniPro controller v1.8, a silicon-proven MIPI M-PHY v4.1, verification IP, and an IP prototyping kit.

The IP delivers 11.6Gbit/s per lane, double the bandwidth of the UFS 2.1 standard.

The MIPI M-PHY draws less than 3.5 mW/Gbit/s per lane when implemented in a finFET process. It also supports various burst modes and power-management modes and has a fast recovery time.

The UFS 3.0 host controller has an inline encryption and decryption engine, to enable secure data exchange with storage.

The IP prototyping kit enables hardware designers to do interoperability testing before silicon is available and software developers to start work sooner.

“Implementing the latest UFS 3.0 interface with MIPI M-PHY v4.1 for the physical layer and the new UniPro v1.8 for the link layer enables designers to achieve the best performance and power efficiency for their flash storage SoCs,” said Joel Huloux, chairman of the MIPI Alliance board of directors.

The DesignWare UFS 3.0 host controller, MIPI UniPro v1.8 Controller, MIPI M-PHY v4.1 for 16nm, 12nm and 7nm FinFET processes, and verification IP are available now. The IP prototyping kit should be available in the second quarter of this year.

Comments are closed.


Synopsys Cadence Design Systems Siemens EDA
View All Sponsors