EMA spins off IP, content and services activities
EMA Design Automation to launch sister company, Accelerated Designs, to help clients streamline processes, cut manual effort, and connect data.
IP
Arm gives Helium to low-end Cortex-M core
Arm has added machine-learning extensions and pointer-security instructions to its latest Cortex-M series core.
Imec makes virtual fab public for green analysis
Imec has a version of its imec.netzero virtual fab tool accessible to the general public with the aim of showing the environmental impact of IC manufacturing.
Codasip pips Arm to commercial CHERI with RISC-V version
Codasip has put support for a set of instruction extensions intended to secure memory into its RISC-V core designs.
X-Fab adds galvanic isolation to CMOS process
X-Fab has made it possible to put galvanic isolation based on capacitive coupling directly into chips made on its XA035 process.
Companies partner for embeddable ReRAM
SureCore and Intrinsic have teamed up to provide a way to implement resistive random-access memory as an SoC-embeddable technology.
Accellera publishes draft of CDC standard
Accellera has published for public review version 0.1 of a standard designed to help pass clock-domain crossing information between EDA tools.
Imperas builds model of Tenstorrent AI core
Imperas Software has worked with AI specialist Tenstorrent to create and distribute a model of the Ascalon processor core.
Image sensors shrink at IEDM
This year’s IEDM features a number of papers that seek to drive down the size and boost the performance of image sensors.
VLSI Symposium 2024 looks to bridge digital and physical
The IEEE Symposium on VLSI Technology & Circuits switches back to Honolulu for its 44th year in the summer of next year and has issued its call for papers, with a deadline of early February for contributions.