IP

Recent developments have made Open-RAN look more attractive as a way of implementing 5G systems. This is helping to drive a shift-left in verification and test.

DAC provided a forum for the growing number of verification efforts focused on checking the architectural compliance and overall RTL quality of RISC-V processors.

The chair of Accellera’s IP security assurance working group expects the draft standard for hardening hardware core to be out by the end of the year.

Version-control specialist Perforce Software has bought Methodics, which focuses on the lifecycle and traceability management of semiconductor IP.

Heterogeneous integration has the potential to overcome the yield and cost challenges presented by the growing headwinds associated with process scaling. But it may take a dramatic rethink in design approaches.

In a panel session at VLSI Symposia, AMD described how the economics have come down strongly in favor of multichip integration for multicore server processors.

Arm is to return to focusing on semiconductor IP following the decision to spin out its IoT operations to separate groups within the Softbank empire.

Siemens has agreed to acquire UK-based debug and on-chip instrumentation startup UltraSoC and will fold the operation into Mentor’s Tessent test-software product line.

Moortec has reworked its thermal-sensing core design to allow for finer-grained use on SoCs being designed for the 5nm node.

DVCon US is to repeat sessions online from today until the middle of August, with exclusive access to registered attendees through early June.