April 24, 2019
Accellera is trying to standardize extensions to UVM for mixed-signal design.
April 22, 2019
Large-scale MCMs and novel device architectures bookend the papers on machine learning at VLSI Symposia in an event that will also cover chiplet integration and other topics.
April 12, 2019
Synopsys and GLOBALFOUNDRIES are developing a portfolio of automotive IP for the chipmakerās 22nm fully depleted silicon-on-insulator (22FDX) process.
April 2, 2019
Menta eFPGA IP is highly configurable making it well suited to the evolving designs that exploit HLS abstraction.
March 26, 2019
DVCon Europe has added embedded software, digital twin, machine learning, and RISC-V to the topics the conference organizers want to cover.
March 20, 2019
Not only has Microsoft decided to make a compression algorithm intended for data centers open source, the company the company is providing its own RTL to anyone who wants to implement it in silicon.
March 18, 2019
The ODSA Workgroup formed by Netronome and others is looking to adopt the PIPE standard for interconnecting chiplets as it starts work on a proof-of-concept module.
March 15, 2019
Registration has opened for the first ES Design West exhibition, which takes place alongside Semicon West in San Francisco in July.
March 12, 2019
The Design Automation Conference (DAC) has kicked off free registration for the exhibit floor at early June's Las Vegas event.
March 11, 2019
5G has given Beijing a development template to use across its Made in China 2025 program.