Codasip pips Arm to commercial CHERI with RISC-V version
Codasip has put support for a set of instruction extensions intended to secure memory into its RISC-V core designs.
memory protection
Arm starts pulling security extensions into processor cores
The Arm Cortex-A78C extends the reach of the core into larger tablets and brings in one of a series of memory-protections extensions that will be used in the company's standard cores.
ARM unveils superscalar addition to Cortex-M microcontrollers
ARM's latest core, the dual-issue M7 borrows features from the Cortex-R family for safety-critical applications as well as adding the option of cache memory.
Latest Nucleus RTOS offers secure memory partitioning for mid-market design
Mentor's new version of its RTOS targets once high-cost flexibility with secure and reliable in-operation upgrades and app swap-outs for medical, industrial and smart energy.
ARM v8-R launch focuses on safety applications
ARM has launched the -R version of its v8 architecture, targeting applications in automotive and industrial systems and possibly spawning a new generation of Linux-oriented microcontollers.
PLATINUM SPONSORS
View All Sponsors