SureCore has started running 30-day trials of its low-power memory compiler.
SureCore is introducing an IP customization service intended to deliver SRAM cores tuned to specific power and performance requirements for wearable, wireless, augmented reality, and IoT devices.
Embedded SRAM IP said to reduce dynamic, static power on FDSOI at cost of extra 10% area
Physical-IP startup SureCore has been awarded $380,000 to build a demo chip for a low-power SRAM design the company is aiming at finFET and FD-SOI processes.
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