Fast process access gets Moortec onto 7nm
Early access to tools for new processes is helping Moortec deliver IP to determine the real-time health of on-chip circuits.
IP
Ceva extends control-oriented DSP
Ceva has followed its IoT-oriented Ceva-X series of processor cores with a more powerful family that is designed to handle control and signal-processing algorithms using the same pipeline.
IEDM shows progress on embedded eMRAM
Embedded magnetic RAM is emerging as a contender for on-chip memory not just from a density standpoint but from that of power.
Microchip opts for RISC-V cores in SoC FPGA
Microsemi has put multiple RISC-V cores into a new generation of SoC FPGAs, intended for embedded systems that need to run Linux.
Achronix builds machine learning IP into eFPGA
Achronix has incorporated direct support for machine learning into the latest version of its eFPGA architecture.
Netronome launches chiplet initiative for network-accelerator SIPs
Data-center networking specialist Netronome has recruited a number of silicon makers and IP suppliers to a standard for chiplet designs that can be used in SIPs for edge computers and servers.
Cadence adds deep-learning support to audio DSP
Cadence has added direct support for neural networks to the latest iteration of its DSP cores aimed at audio systems.
IEDM to examine scaling from multiple directions
CMOS moving to 3nm and DRAM going beyond 20nm scaling are two of the late papers at the upcoming IEDM and part of a larger examination of semiconductor trends.
UltraSoC combines tools for cross-SoC debug and analysis
Following deals with Imperas and Percepio, UltraSoC has released an IDE aimed at debug, run control, performance tuning and runtime analytics for SoC development.
Synopsys takes TSMC design into the cloud; IP to 7nm, 5nm and automotive processes
Synopsys is taking IC design on TSMC processes into the cloud with the launch of the Synopsys Cloud Solution, which will run on platforms from Synopsys, Amazon Web Services (AWS) or Microsoft Azure.