May 8, 2017
Our extended fireside chat with Mentor Chairman and CEO Wally Rhines begins by canvassing his thoughts now the Siemens deal is done.
March 22, 2017
The equipment giant's Computational Process Control strategy takes a pragmatic approach to Industry 4.0 and is likely to influence EDA tools for incoming nodes.
October 3, 2016
Multi-patterning, finFETs and more are forcing more detailed overhauls of P&R software at each process node. We dig into some of the key new issues and how they are being addressed.
September 23, 2015
AMD's Radeon R9 family is the result of eight years developing 3D-IC and interposer technology. What lessons did the company learn?
March 26, 2015
John Sturtevant looks at ongoing preparations for the incoming node and charts significant progress that has already been made.
January 26, 2015
Precise curved geometries are vital to making this emerging and cost-effective CMOS-based technology work. This primer explains its advantages and how litho tools are evolving to meet the challenges it presents.
November 5, 2014
Fab and IP vendor collaboration is making pattern matching-based libraries a vital component of DRC accuracy and efficiency. Learn how to take advantage.
October 10, 2014
FInFET memories have different defects than those based on planar transistors. Here's how to test and repair them.
September 10, 2014
Innovation in physical verification is driven by incoming nodes but new tools and features can and should be fed back up the technology chain.
August 12, 2014
Sign-off lithography verification is vital as we move beyond double to multi-patterning but changing responsibilities in the flow must be handed with care.