Pre- and post-processing EDA techniques help streamline design rule checks and delivery efficient waivers to speed design and debug.
Reliability rule checks need - and now get - more granular analysis that allows designers to adopt proposed waivers with much greater confidence.
Dina Medhat describes what you need to know about the types of waiver strategy that can be applied.
Fab and IP vendor collaboration is making pattern matching-based libraries a vital component of DRC accuracy and efficiency. Learn how to take advantage.
You can waive some physical verification errors related to legacy IP found in foundry DRC checks. Knowing which has involved lengthy manual analysis. TSMC is enhancing the process with automation.
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